Location: Bengaluru / Kolkata
Company: HPE
HPE- Juniper Silicon team seeks ASIC Design Engineers to develop next generation of ASICs for our core routers, switches, and firewalls.
What You’ll Do
- Define and architect high-performance blocks for the latest, most advanced networking ASICs
- Perform micro-architecture and logic design to deliver maximum throughput, while using minimum power
- Collaborate with the verification team in the development of the test plan and assist in debugging test failures
- Collaborate with the physical design team to develop timing constraints, analyse timing violations, and perform timing fixes
What You Need To Bring
- Strong Verilog RTL coding skills
- Knowledge of Synopsys Design Compiler, Verplex LEC, and Spyglass is desirable
- Experience designing ASICs for networking protocols (Ethernet, FCoE) is a plus
- Knowledge of high-performance memory subsystems
- Knowledge of multi-domain clock synchronisation and high-speed serial interfaces
- Strong problem-solving and ASIC debugging skills
- Excellent written and verbal communication skills
- MSEE or BSEE is required
- 3+ years of design experience in ASIC or related fields
- Proficiency in Verilog, VHDL, and design tools like Synopsys or Cadence
- Strong analytical and problem-solving skills
- A collaborative mindset and attention to detail