New superconducting system in initiation to target fault tolerance and real-world applications in materials science and beyond, pushing quantum tech towards more breakthroughs.
Fujitsu’s R&D team is all geared up towards revolutionising the area of Quantum Computing. The official announcement has confirmed the development of a superconducting quantum computer of operational capacity of plus 10,000 physical qubits by fiscal year 2030.
The initiative is centred on building a fault-tolerant system capable of operating with 250 logical qubits using its own early-fault-tolerant architecture. The aim is to bring in effect the practical and industrial quantum computing applications in complex areas like materials science to unlock ground-breaking discoveries and advance key scaling technologies across various technical domains, marking a significant milestone in the race to scale quantum technologies for real-world use.
Vivek Mahajan, Corporate Executive Officer, Corporate Vice President, CTO, in charge of System Platform, Fujitsu Limited, comments: “We are already recognised as a world leader in quantum computing across a broad spectrum, from software to hardware. This project, led by NEDO, will contribute significantly to Fujitsu’s goal of further developing a fault-tolerant superconducting quantum computer. “
This development reflects growing momentum in quantum research globally, as nations invest heavily in next-generation infrastructure to address computational problems beyond the reach of traditional supercomputers.
Mr. Mahajan further confirmed using diamond-spin technology in this area. Fujitsu will be developing the next generation of its HPC platform and will further integrate its platforms for high-performance and quantum computing to offer a comprehensive computing platform.
Scaling to larger systems require overcoming various challenges
With new technical aims in mind, the complexity at each and every level increases. The main focus area at later stages become achieving the targeted objectives while minimising errors and eddies occurring.
The main challenges that are most probable while scaling the quantum efficiencies are listed below:
- Maintaining high fidelity across multiple interconnected qubit chips.
- Achieving greater integration of components and wiring within dilution refrigerators.
- Quantum error generations and corrections.
- Software and algo dysfunctions.
- Speed, heating, and other issues.
The R&D aims to focus on overcoming these issues with the promise to give high-throughput, high-precision qubit manufacturing technology, chip-to-chip interconnect technology, high-density packaging, and low-cost qubit control to minimise heat dissipation and component count; and finally, quantum error correction technology.
A promise in building…. a new ray of tech revolution in making…
As the global competition in quantum computing intensifies, this project stands out for its ambitious scale and clear focus on fault tolerance, the key to unlocking practical applications. This is about building the foundation for a future where quantum systems augment or even outperform traditional computing in fields critical to scientific progress and economic security.